A New Low Power Dynamic Full Adder Cell Based on Majority Function
نویسندگان
چکیده
A new low power dynamic CMOS one bit full adder cell is presented. In this design the time consuming XOR gates are eliminated. It is based on Majority Function. This new cell is compared with two widely used dynamic adders as well as other conventional and recently proposed architectures. It is implemented in two level dynamic CMOS with zipper technique and the number of transistors, chip area and switching activity is significantly reduced.
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